The basic, single board, GPFC configuration can be extended with additional boards to add more memory or I/O resources. These extension boards are attached to the main one using the two stackable connectors: system bus connector and power distribution connector. The main board provides transceivers on the system bus thus ensuring the reliable bus operation for extended configurations.
Example: a triple board GPFC configuration
Extension boards, being directly connected to the system bus, access the full power of the CPU. Large and fast memories and high speed peripherals can be implemented there, significantly enchancing the basic GPFC functionality. The first extension board under design will, however, be rather simple providing a small memory pool and two IP slots.
ColdFire CPU has a so called BDM (Background Debug Monitor) feature which allows for an external device to take ultimate control on the CPU operation. This feature facilitates effective hardware and software debugging. ColdFire inherited BDM from its predecessor, M68k family, thus many existing M68k-oriented tools can be used with ColdFire (for example, SingleStep debugger from SDS).
The GPFC main board provides the BDM interface via a separate 26-pin auxiliary connector. It is pin and plug compatible with the SingleStep debugger's adapter for PC platforms.
The GPFC's main board contains the multifunctional system controller implemented in the Xilinx FPGA chip (see the "Architecture" section for more details). A considerable FPGA space is currently available for implementation of specific coprocessor like "peripherals".
These firmwared devices may include registers and buses, RAM and ROM memories, state machines, multiplexors, arithmetic and logic function units, etc. A complete simulation suite, including the timing simulation, can be performed before testing the real firmware.