The H1 Drift Chamber Data Acquisition (DCDAQ) is responsible for the readout of the Central Jet Chambers (CJC1 and CJC2), the Outer Z-Chamber (COZ), the Forward Tracking Detector (FTD) and the Forward Muon Detector (FMD). All systems are read out by 100MHz ADCs (FADCs) into a digital event buffer of 2.56 micro second depth.
The readout is running in 'common stop mode', eg the event pipeline is written continously, overwriting oldest data first in a cyclic buffer. With a Level 1 trigger the pipeline is stopped and after positive Level2 and Level3 decision from the H1 central trigger logic the event is readout out via a hardware zero suppression unit (Scanner) and a multi event buffer board (Accelerator) into a VME CPU memory. Up to 16 FADCs are served by one Scanner and Accelerator pair and a VME CPU and are placed in one VME crate (FADC crate).
The data of up to 9 FADC crates are then collected via a vertical crate interconnect board into the central VME crate (Master crate) of the subdetector. Here another VME CPU calculates online drift time information and charge out of the recorded pulse shapes. The time and charge information is then send further upstream to the H1 event builder by the master processor which builds the full event for each subdetector.
The DCDAQ is divided into 3 independent subsystems, each with a master crate and 6, 12 and 26 FADC crates respectively. Each system can be configured by a Supervisor program running on an Apple Macintosh which allows to change all relevant parameters for the readout.
For a shift instruction of the DCDAQ system look at the H1 DCDAQ Shift Guide (outdated !!)
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